Logic gates are the building blocks of digital electronics. Simple logic gates are efficiently implemented in various IC packages such as the 74HCXX series. However, it is educational to have a look at the implementation using just NPN transistors.

\(\mathbf{A}\) | \(\mathbf{B}\) | \(\neg \mathbf{A}\) | \(\neg \mathbf{B}\) | \(\mathbf{A} \vee \mathbf{B}\) | \(\mathbf{A} \wedge \mathbf{B}\) | A XOR B | A NAND B | A NOR B |
---|---|---|---|---|---|---|---|---|

1 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 |

1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 |

0 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 |

0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 |

### NOT (inverter) gate

This is the simplest logic gate (not considering buffers) and a basic design for a NOT logic gate using a single NPN transistor is given by

### AND gate

The AND gate can be constructed Using two NPN transistors:

### OR gate

Note, that this gate can be constructed from the NOT and AND gate since \(\neg(\neg\mathbf{A} \vee \neg\mathbf{B}) = \mathbf{A} \vee \mathbf{B}\).

\(\mathbf{A}\) | \(\mathbf{B}\) | \(\mathbf{A} \wedge \mathbf{B}\) | \(\neg \mathbf{A}\) | \(\neg \mathbf{B}\) | \(\neg\mathbf{A} \vee \neg\mathbf{B}\) |
---|---|---|---|---|---|

1 | 1 | 1 | 0 | 0 | 0 |

1 | 0 | 1 | 0 | 1 | 0 |

0 | 1 | 1 | 1 | 0 | 0 |

0 | 0 | 0 | 1 | 1 | 1 |

However, it is possible to save a transistor using the following scheme

### NAND gate

While all logic operations obviously can be obtained by combining AND,
NOT and OR gates, it is in fact possible to do the same using only
NAND gates (or NOR gates, which both for that reason are
called **universal gates**).

In particular, we can obtain the NOT gate as

And the AND gate as

This logic gate can also be constructed using just two transistors:

### XOR gate

The Exclusive OR (XOR) gate is true if exactly one input is true. This can also be seen as addition modulo 2 (see the half adder below).

It is easy to verify that \(A \operatorname{\tiny XOR} B = (A \operatorname{\tiny NAND} B) ~\operatorname{\tiny AND}~ (A \operatorname{\tiny OR} B)\) and hence we can construct the gate from the three previously defined logic gates:

## Half adder

By combining logic gates other logic and arithmetic components can be
constructed. An interesting example is the **half adder**, which can add two bits
together (inputs A and B) which outputs given by a *sum* bit, S, and a *carry* bit, C.

\(\mathbf{A}\) | \(\mathbf{B}\) | SUM | CARRY |
---|---|---|---|

1 | 1 | 0 | 1 |

1 | 0 | 1 | 0 |

0 | 1 | 1 | 0 |

0 | 0 | 0 | 0 |

This is a key component in most ALU’s and can be constructed by combining a XOR and an AND gate in the following way:

Here is an example of a half adder constructed using only NPN transistors: